The present invention is in the field of optical monitoring techniques, and relates to a test structure to be formed on a real metal-based patterned structure, and a method of controlling a process of chemical mechanical planarization (CMP) applied to the metal-based patterned structure utilizing the test structure. The invention is particularly useful in the manufacture of semiconductor devices such as wafers.
In the manufacture of semiconductor devices, aluminum has been used almost exclusively as the main material for interconnects. However, recent developments in this field of the art have shown that copper is poised to take over as the main on-chip conductor for all types of integrated circuits. Compared to aluminum, copper has a lower resistance, namely, less than 2 xcexcxcexa9-cm, even when deposited in narrow trenches, versus more than 3 xcexcxcexa9-cm for aluminum alloys. This property is critically important in high-performance microprocessors and fast static RAMs, since it enables signals to move faster by reducing the so-called xe2x80x9cResistance-Capacitancexe2x80x9d(RC) time delay. Additionally, copper has a superior resistance to electro-migration, which leads to lower manufacturing costs, as compared to aluminum-based structures.
During the manufacture of semiconductor devices, a semiconductor wafer undergoes a sequence of photolithography-etching steps to produce a plurality of patterned layers (stacks). Then, depending on the specific layers"" structure or a specific production process, the uppermost layer of the wafer may or may not undergo a CMP process to provide a smooth surface of this layer.
When manufacturing aluminum-based structures, the application of a CMP process to the uppermost layer having aluminum-containing regions is usually not needed. As for the copper-based structures (or tungsten-based structure as well), the manufacturing process requires the CMP to be used for removing the residuals of metal. This is true also for processes where aluminum is deposited by the single or dual Damascene process.
With the conventional technology of planarization, interlayer dielectricxe2x80x94ILD polishing occurs after every metal deposition and etching step. The same is not true for damascene processing, wherein the post-polish surface is expected to be free of topography. However, topography is induced because of erosion of densely packed small feature arrays and dishing of the metal surface in large features.
Copper CMP is more complex because of the following: On the one hand, barrier layers (such as tantalum or tantalum nitride) should be removed completely to prevent the so-called xe2x80x9cunder-polishingxe2x80x9d of the wafer, in which case the wafer""s surface contains residuals of a layer to be removed. On the other hand, copper should be removed without an excessive over-polishing of any feature (erosion or dishing). This is difficult to implement, because current copper deposition processes are not as uniform as the oxide deposition process. An additional problem is an accumulated layer-by-layer topography or non-planarity across the wafer""s surface caused by erosion and dishing effects.
xe2x80x9cErosionxe2x80x9d is the phenomenon while that develops during the copper polishing process. FIG. 1 illustrates a stack-like copper-based structure 10 after the application of a CMP process thereto. The structure 10 includes an ILD bottom layer 12, the so-called xe2x80x9cetch stopxe2x80x9d layer 14 (e.g., SiN), ILD layer portions 16a and 16b, and a dense structure 20 including spaced-apart regions of a copper layer, generally at 18, spaced from each other by ILD layer portions 22 (isolated from the surrounding oxide by a thin barrier layer, which is not specifically shown). Hence, the stack layers of the dense structure 20 are composed of the ILD layer portions 22 and the copper layer portions 18, and are surrounded by the ILD layer portions 16a and 16b. 
Such a composite structure 10 having non-uniform mechanical and chemical properties imposes a different a polishing rate or removal distribution over the regions 16a, 16b and 20. Due to different chemical and mechanical properties of the ILD layer portions 16a-16b, as compared to those of the small features in the dense metal-containing (copper) region 20, in some cases, the polishing process proceeds quicker above the region 20 than above the portions 16. The CMP results in a bent-like local profile 24 (concave) of the upper surface of the structure 20. The existence of the profile 24 is called xe2x80x9cerosionxe2x80x9d, presenting the direct loss of ILD and metal (e.g., copper) within a region 22a. 
Due to the above-mentioned factors, an additional effect, the so-called xe2x80x9cmetal line recessxe2x80x9d designated 26 takes place presenting another type of defect on the wafer induced by the CMP process applied thereto. Yet another undesirable type of defect induced on the wafer""s surface by the CMP process is an effect of barrier layer residues, designated 28, and an effect of the metal polishing called xe2x80x9cdishingxe2x80x9d and relating to the non-uniform thickness removal across a relatively large non-patterned metallic area.
One possible solution for minimizing the above-mentioned negative effects consists of a tight control of the CMP process, e.g., using a spectroscopy-based optical system (such as the NovaScan 210 commercially available from Nova Measuring Instruments Ltd., Israel). However, as the measured layer level increases, the complexity of the layer stack (consisting of multiple levels of OX/Etch Stop/OX/Cap layers) impairs the measurement accuracy. This is due to the fact that optical measurements are performed in predetermined sites within the wafer""s dies consisting of measuring the optical response of a top layer stack in these sites while the measured parameters are affected by underlying layers. Separating the influence of underlying layers from that of the top layer stack signal presents a sophisticated problem.
There is accordingly a need in the art to facilitate the control of a CMP process when being applied to a patterned structure such as a semiconductor wafer having metal (e.g., copper) regions, by providing a novel test structure for tight control of the CMP process by processing the test structure with the same CMP as the patterned structure with real features and applying optical measurements to the test structure.
The main idea of the present invention consists of providing such a test structure that, when optical measurements are applied to a measurement area of the top surface of the test structure to detect a light response (in particular, reflection) of the measurement area, the contribution of layers or levels underneath the measurement area to the light response is substantially reduced. Additionally, the test structure is such that, when it is processed by the CMP, a desirable planarity of the measurement area within the test structure is provided. This is implemented by providing the test structure with at least two structures aligned along a vertical axis in a spaced-apart parallel relationship, each pattern structure comprising at least one pattern zone containing spaced-apart metal regions, the test structure thereby comprising at least one pair of vertically aligned upper and lower pattern zones. The upper and lower pattern zones in each pair have different patterns (i.e., different pitch values and, optionally, also different duty cycle values), and are oriented with respect to each other such that the metal regions of the lower pattern are located underneath the spaces between the metal regions of the upper pattern within the measurement area.
Thus, according to one aspect of the present invention, there is provided a test structure, which is to be formed on a patterned structure, progressing on a production line and having a pattern area having metal-containing regions and being representative of real features of the patterned structure, so as to enable concurrent application of a Chemical Mechanical Planarization process to a top surface of the test structure and to a top surface of said pattern area, wherein the test structure comprises at least two structures aligned along a vertical axis in a spaced-apart parallel relationship, each structure comprising at least one pattern zone containing spaced-apart metal regions, the test structure thereby comprising at least one pair of vertically aligned upper and lower pattern zones, the upper and lower pattern zones in each pair having different patterns oriented with respect to each other such that the metal regions of the lower pattern are located underneath the spaces between the metal regions of the upper pattern.
The number of such pairs of upper and lower structures in the test structure depends on a specific manufacturing step after which the CMP is to be applied to the patterned structure progressing on a production line.
Each of the upper and lower structures may comprise at least one additional pattern zone containing spaced-apart metal regions, the two pattern zones being spaced by a zone having no metal regions. In this case, the two pattern zones of the same level structure are different, namely, have different pitch values and, optionally, also different duty cycle values. The upper and lower structures may be identical, and, in order to provide the above relative orientation of each pair of the upper and lower patterns, the structures can be shifted with respect to each other at a 180xc2x0-angle. Generally, the less the overlap (along the horizontal axis) between the identical pattern zones of the upper and lower pattern layers, the better the optical isolation of the lower structure. Preferably, in order to provide such a minimal overlap, the pitches xcex941 and xcex942 and duty cycles D1 and D2 of the upper and lower patterns, respectively, satisfy the following relationships: xcex942=Kxc2x7xcex941; D2=100%xc2x7(1xe2x88x92(Kxc2x7D1/100%), wherein K are integer numbers. If the upper and lower patterns in the pair (i.e., vertically aligned) have the same cycles, in order to provide the effect of optical isolation between the upper and lower structures, the patterns should be shifted with respect to each other by half the pattern period.
The test structure may comprise a plurality of spaced-apart pattern layer structures. In this case, each two locally adjacent (along a vertical axis) patterns are aligned along two mutually perpendicular horizontal axes, such that the metal regions therein are perpendicular to each other.
According to yet another aspect of the present invention, there is provided a patterned structure that has a pattern area formed by spaced-apart metal-containing regions representative of real features of the patterned structure, and is formed with a test site containing a test structure, which comprises at least two structures aligned along a vertical axis in a spaced-apart parallel relationship, each structure comprising at least one pattern zone containing spaced-apart metal regions, the test structure thereby comprising at least one pair of vertically aligned upper and lower pattern zones, the upper and lower pattern zones in each pair having different patterns oriented with respect to each other such that the metal regions of the lower pattern are located underneath the spaces between the metal regions of the upper pattern.
According to yet another aspect of the present invention, there is provided a method of controlling a process of Chemical Mechanical Planarization (CMP) applied to a group of similar patterned structures progressing on a production line, each pattern structure having a pattern area formed by spaced-apart metal-containing regions representative of real features of the patterned structure, the method comprising the steps of:
(a) forming at least one of the patterned structures progressing on a production line with a test site containing a test structure, which comprises at least two structures aligned along a vertical axis in a spaced-apart parallel relationship, each structure comprising at least one pattern zone containing spaced-apart metal regions, the test structure thereby comprising at least one pair of vertically aligned upper and lower pattern zones, the upper and lower pattern zones in each pair having different patterns oriented with respect to each other such that the metal regions of the lower pattern are located underneath the spaces between the metal regions of the upper pattern;
(b) applying the CMP process to the test site, thereby processing both the test structure and the pattern area;
(c) applying optical measurements to the processed test structure to detect an optical response of the test structure, wherein the optical response is substantially not affected by a light response of layers of the test structure located underneath the lower structure;
(d) analyzing the detected optical response to determine whether there exists at least one of erosion and dishing effects caused by the CMP processing, the analysis of the optical response enabling to adjust a working parameter of the CMP process prior to applying the CMP process to another patterned structure.